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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 15 days ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
ICPP
1993
IEEE
13 years 11 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
BMCBI
2006
116views more  BMCBI 2006»
13 years 7 months ago
Optimized mixed Markov models for motif identification
Background: Identifying functional elements, such as transcriptional factor binding sites, is a fundamental step in reconstructing gene regulatory networks and remains a challengi...
Weichun Huang, David M. Umbach, Uwe Ohler, Leping ...
JCP
2008
119views more  JCP 2008»
13 years 7 months ago
Performance Comparisons, Design, and Implementation of RC5 Symmetric Encryption Core using Reconfigurable Hardware
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
Omar S. Elkeelany, Adegoke Olabisi
PAM
2010
Springer
14 years 2 months ago
Toward Topology Dualism: Improving the Accuracy of AS Annotations for Routers
Abstract. To describe, analyze, and model the topological and structural characteristics of the Internet, researchers use Internet maps constructed at the router or autonomous syst...
Bradley Huffaker, Amogh Dhamdhere, Marina Fomenkov...