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» Source Address Validation: Architecture and Protocol Design
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DATE
2006
IEEE
78views Hardware» more  DATE 2006»
15 years 8 months ago
A time-triggered ethernet (TTE) switch
This paper presents the design of a Time-Triggered Ethernet (TTE) Switch, which is one of the core units of the Time-Triggered Ethernet system. Time-triggered Ethernet is a commun...
Klaus Steinhammer, Petr Grillinger, Astrit Ademaj,...
UBIMOB
2009
ACM
225views Management» more  UBIMOB 2009»
15 years 9 months ago
Historical data storage for large scale sensor networks
Wireless sensor networks are rapidly finding their way through a plethora of new applications like precision farming and forestry, with increasing network scale, system complexit...
Loïc Petit, Abdelhamid Nafaa, Raja Jurdak
IWCMC
2009
ACM
15 years 11 months ago
Optimal cooperative spectrum sensing in cognitive sensor networks
This paper addresses the problem of optimal cooperative spectrum sensing in a cognitive-enabled sensor network where cognitive sensors can cooperate in the sensing of the spectrum...
Hai Ngoc Pham, Yan Zhang, Paal E. Engelstad, Tor S...
IPPS
2008
IEEE
15 years 11 months ago
Modeling and analysis of power in multicore network processors
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
S. Huang, Y. Luo, W. Feng
CCGRID
2010
IEEE
15 years 3 months ago
An Adaptive Data Prefetcher for High-Performance Processors
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
Yong Chen, Huaiyu Zhu, Xian-He Sun