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» Source-level execution time estimation of C programs
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IPPS
2009
IEEE
14 years 2 months ago
Exploring FPGAs for accelerating the phylogenetic likelihood function
Driven by novel biological wet lab techniques such as pyrosequencing there has been an unprecedented molecular data explosion over the last 2-3 years. The growth of biological seq...
Nikolaos Alachiotis, Euripides Sotiriades, Apostol...
CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 4 months ago
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length da...
Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, ...
VEE
2006
ACM
116views Virtualization» more  VEE 2006»
14 years 1 months ago
Relative factors in performance analysis of Java virtual machines
Many new Java runtime optimizations report relatively small, single-digit performance improvements. On modern virtual and actual hardware, however, the performance impact of an op...
Dayong Gu, Clark Verbrugge, Etienne M. Gagnon
GECCO
2005
Springer
136views Optimization» more  GECCO 2005»
14 years 1 months ago
Stress testing real-time systems with genetic algorithms
Reactive real-time systems have to react to external events within time constraints: Triggered tasks must execute within deadlines. The goal of this article is to automate, based ...
Lionel C. Briand, Yvan Labiche, Marwa Shousha