104 search results - page 3 / 21 » Source-to-Source Architecture Transformation for Performance... |
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
This work presents the first extensive study of singlenode performance optimization, tuning, and analysis of the fast multipole method (FMM) on modern multicore systems. We consid...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
TVLSI
1998
13 years 7 months ago
1998
—In most low-power VLSI designs, the supply voltage is usually reduced to lower the total power consumption. However, the device speed will be degraded as the supply voltage goes...
TVLSI
2008
13 years 7 months ago
2008
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...