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HIPEAC
2009
Springer
14 years 2 months ago
Parallel H.264 Decoding on an Embedded Multicore Processor
In previous work the 3D-Wave parallelization strategy was proposed to increase the parallel scalability of H.264 video decoding. This strategy is based on the observation that inte...
Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurli...
IEEEPACT
2002
IEEE
14 years 21 days ago
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
Jaewook Shin, Jacqueline Chame, Mary W. Hall
FCCM
2009
IEEE
115views VLSI» more  FCCM 2009»
13 years 11 months ago
Multi-Core Architecture on FPGA for Large Dictionary String Matching
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
Qingbo Wang, Viktor K. Prasanna
ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
CHI
2005
ACM
13 years 9 months ago
Improving revisitation in fisheye views with visit wear
The distortion caused by an interactive fisheye lens can make it difficult for people to remember items and locations in the data space. In this paper we introduce the idea of vis...
Amy Skopik, Carl Gutwin