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PLDI
2010
ACM
14 years 20 days ago
Decoupled lifeguards: enabling path optimizations for dynamic correctness checking tools
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
Olatunji Ruwase, Shimin Chen, Phillip B. Gibbons, ...
SIGMOD
2000
ACM
133views Database» more  SIGMOD 2000»
13 years 12 months ago
Data Mining on an OLTP System (Nearly) for Free
This paper proposes a scheme for scheduling disk requests that takes advantage of the ability of high-level functions to operate directly at individual disk drives. We show that s...
Erik Riedel, Christos Faloutsos, Gregory R. Ganger...
FCCM
1998
IEEE
107views VLSI» more  FCCM 1998»
13 years 12 months ago
Frequency-Domain Sonar Processing in FPGAs and DSPs
Over the past year we have been exploring the use of FPGA-based custom computing machines for several sonar beamforming applications, including time-domain beamforming[1], frequen...
Paul Graham, Brent E. Nelson
ASPLOS
1998
ACM
13 years 12 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
13 years 11 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus