Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
Olatunji Ruwase, Shimin Chen, Phillip B. Gibbons, ...
This paper proposes a scheme for scheduling disk requests that takes advantage of the ability of high-level functions to operate directly at individual disk drives. We show that s...
Erik Riedel, Christos Faloutsos, Gregory R. Ganger...
Over the past year we have been exploring the use of FPGA-based custom computing machines for several sonar beamforming applications, including time-domain beamforming[1], frequen...
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...