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TVLSI
2008
105views more  TVLSI 2008»
15 years 4 months ago
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
Praveen Bhojwani, Rabi N. Mahapatra
CHI
2009
ACM
16 years 5 months ago
Interactive slide: an interactive playground to promote physical activity and socialization of children
We present a novel playground platform that will hopefully help in countering two important issues in children in the developed world: lack of physical activity and lack of social...
Joan Soler-Adillon, Narcís Parés
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
16 years 4 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
DELTA
2008
IEEE
15 years 11 months ago
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
Hans G. Kerkhoff, Jarkko J. M. Huijts
SIGCOMM
2006
ACM
15 years 10 months ago
In VINI veritas: realistic and controlled network experimentation
This paper describes VINI, a virtual network infrastructure that allows network researchers to evaluate their protocols and services in a realistic environment that also provides ...
Andy C. Bavier, Nick Feamster, Mark Huang, Larry L...