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» Speculative Parallel Threading Architecture and Compilation
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ISHPC
2003
Springer
14 years 27 days ago
On the Implementation of OpenMP 2.0 Extensions in the Fujitsu PRIMEPOWER Compiler
Abstract. The OpenMP Architecture Review Board has released version 2.0 of the OpenMP Fortran language specification in November 2000, and version 2.0 of the OpenMP C/C++ language...
Hidetoshi Iwashita, Masanori Kaneko, Masaki Aoki, ...
ICCD
2000
IEEE
80views Hardware» more  ICCD 2000»
14 years 3 days ago
Power-Sensitive Multithreaded Architecture
The power consumption of microprocessors is becoming increasingly important in design decisions, not only in mobile processors, but also now in high-performance processors. Power-...
John S. Seng, Dean M. Tullsen, George Cai
IJPP
2000
94views more  IJPP 2000»
13 years 7 months ago
Path Analysis and Renaming for Predicated Instruction Scheduling
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
Lori Carter, Beth Simon, Brad Calder, Larry Carter...
ARC
2007
Springer
150views Hardware» more  ARC 2007»
13 years 11 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
ICFP
2007
ACM
14 years 7 months ago
Feedback directed implicit parallelism
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
Tim Harris, Satnam Singh