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IEEEPACT
2005
IEEE
14 years 1 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
DATE
2010
IEEE
131views Hardware» more  DATE 2010»
14 years 23 days ago
Energy-performance design space exploration in SMT architectures exploiting selective load value predictions
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria...
MICRO
2005
IEEE
114views Hardware» more  MICRO 2005»
14 years 1 months ago
Address-Indexed Memory Disambiguation and Store-to-Load Forwarding
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
Sam S. Stone, Kevin M. Woley, Matthew I. Frank
CHARME
2003
Springer
110views Hardware» more  CHARME 2003»
13 years 11 months ago
Exact and Efficient Verification of Parameterized Cache Coherence Protocols
Abstract. We propose new, tractably (in some cases provably) efficient algorithmic methods for exact (sound and complete) parameterized reasoning about cache coherence protocols. F...
E. Allen Emerson, Vineet Kahlon
DLOG
2007
13 years 10 months ago
EXPTIME Tableaux for ALC Using Sound Global Caching
We show that global caching can be used with propagation of both satisfiability and unsatisfiability in a sound manner to give an EXPTIME algorithm for checking satisfiability w...
Rajeev Goré, Linh Anh Nguyen