141 search results - page 5 / 29 » Speculative parallelization using software multi-threaded tr... |
COMAD
2008
13 years 10 months ago
2008
A read-only transaction (ROT) does not modify any data. Efforts are being made in the literature to improve the performance of ROTs without correctness and data currency issues. T...
SPAA
2010
ACM
14 years 1 months ago
2010
ACM
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
SPAA
2009
ACM
14 years 9 months ago
2009
ACM
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
CODES
2011
IEEE
12 years 8 months ago
2011
IEEE
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
IPPS
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract—Many studies have shown that load imbalancing causes significant performance degradation in High Performance Computing (HPC) applications. Nowadays, Multi-Threaded (MT1...