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ISMIR
2005
Springer
154views Music» more  ISMIR 2005»
14 years 3 months ago
Exploiting the Tradeoff Between Precision and Cpu-Time to Speed Up Nearest Neighbor Search
We describe a recursive algorithm to quickly compute the N nearest neighbors according to a similarity measure in a metric space. The algorithm exploits an intrinsic property of a...
Pierre Roy, Jean-Julien Aucouturier, Franço...
TACAS
2007
Springer
136views Algorithms» more  TACAS 2007»
14 years 3 months ago
Bisimulation Minimisation Mostly Speeds Up Probabilistic Model Checking
This paper studies the effect of bisimulation minimisation in model checking of monolithic discrete-time and continuous-time Markov chains as well as variants thereof with rewards...
Joost-Pieter Katoen, Tim Kemna, Ivan S. Zapreev, D...
TCAD
2008
112views more  TCAD 2008»
13 years 9 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
IPPS
2000
IEEE
14 years 2 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
DAC
2001
ACM
14 years 10 months ago
Speeding Up Control-Dominated Applications through Microarchitectural Customizations in Embedded Processors
We present a methodology for microarchitectural customization of embedded processors by exploiting application information, thus attaining the twin benefits of processor standardi...
Peter Petrov, Alex Orailoglu