2020 search results - page 188 / 404 » Speeding up Slicing |
137
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DATE
2006
IEEE
16 years 3 days ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
211
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ICDM
2006
IEEE
16 years 2 days ago
2006
IEEE
How closely related are two nodes in a graph? How to compute this score quickly, on huge, disk-resident, real graphs? Random walk with restart (RWR) provides a good relevance scor...
165
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ACG
2006
Springer
16 years 1 days ago
2006
Springer
Abstract. Progressive Pruning (PP) is used in the Monte-Carlo go playing program Indigo. For each candidate move, PP launches random games starting with this move. PP gathers stati...
141
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CHARME
2005
Springer
15 years 11 months ago
2005
Springer
Today, verification is becoming the dominating factor for successful circuit designs. In this context formal verification techniques allow to prove the correctness of a circuit ...
131
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FROCOS
2005
Springer
15 years 11 months ago
2005
Springer
We describe results and status of a sub project of the Verisoft [1] project. While the Verisoft project aims at verification of a complete computer system starting with hardware a...