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ISSS
2002
IEEE
136views Hardware» more  ISSS 2002»
14 years 1 months ago
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu
IPPS
2000
IEEE
14 years 10 days ago
ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI
Abstract. While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet ca...
Markus Fischer, Ulrich Brüning, Jörg Klu...
AIMS
2007
Springer
14 years 2 months ago
A Survey of the High-Speed Self-learning Intrusion Detection Research Area
Intrusion detection for IP networks has been a research theme for a number of years already. One of the challenges is to keep up with the ever increasing Internet usage and network...
Anna Sperotto, Remco van de Meent
ISNN
2007
Springer
14 years 2 months ago
Fast Code Detection Using High Speed Time Delay Neural Networks
This paper presents a new approach to speed up the operation of time delay neural networks for fast code detection. The entire data are collected together in a long vector and then...
Hazem M. El-Bakry, Nikos E. Mastorakis
ISVLSI
2005
IEEE
115views VLSI» more  ISVLSI 2005»
14 years 2 months ago
High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization
The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique...
J. H. Han, Ahmet T. Erdogan, Tughrul Arslan