Sciweavers

214 search results - page 24 / 43
» Speeding up power estimation of embedded software
Sort
View
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
13 years 11 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
ISSS
1999
IEEE
87views Hardware» more  ISSS 1999»
13 years 11 months ago
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications
We present a new exploration and optimization method to select customized implementations for dynamic data sets, as encountered in telecom network, database and multimedia applica...
Chantal Ykman-Couvreur, J. Lambrecht, Diederik Ver...
WSC
2007
13 years 9 months ago
Ant-based approach for determining the change of measure in importance sampling
Importance Sampling is a potentially powerful variance reduction technique to speed up simulations where the objective depends on the occurrence of rare events. However, it is cru...
Poul E. Heegaard, Werner Sandmann
JCP
2007
154views more  JCP 2007»
13 years 7 months ago
Partially Reconfigurable Vector Processor for Embedded Applications
—Embedded systems normally involve a combination of hardware and software resources designed to perform dedicated tasks. Such systems have widely crept into industrial control, a...
Muhammad Z. Hasan, Sotirios G. Ziavras
ISPASS
2006
IEEE
14 years 1 months ago
Modeling TCAM power for next generation network devices
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
Banit Agrawal, Timothy Sherwood