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ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
14 years 1 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
FCCM
2005
IEEE
151views VLSI» more  FCCM 2005»
14 years 1 months ago
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
IPPS
2006
IEEE
14 years 1 months ago
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
IPPS
2007
IEEE
14 years 1 months ago
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path
This paper presents the performance improvements and the energy reductions by coupling a highperformance coarse-grained reconfigurable data-path with a microprocessor in a generic...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
FPL
2004
Springer
101views Hardware» more  FPL 2004»
14 years 24 days ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz