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TVCG
2008
109views more  TVCG 2008»
13 years 9 months ago
Rapid Graph Layout Using Space Filling Curves
Abstract-- Network data frequently arises in a wide variety of fields, and node-link diagrams are a very natural and intuitive representation of such data. In order for a node-link...
Chris Muelder, Kwan-Liu Ma
ENC
2005
IEEE
14 years 3 months ago
Using Alloy to model-check visual design notations
This paper explores the process of validation for the syntax of a graphical notation. We define a unified specification for five of the UML diagrams used by the Discovery Method a...
Anthony J. H. Simons, Carlos Alberto Fernán...
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
14 years 3 months ago
Symbolic Analysis of Nonlinear Analog Circuits
A new method is presented to model symbolically strongly nonlinear circuits, characterized by Piece-Wise Linear (PWL) functions. The method follows the idea of Bokhoven and Leenae...
Alicia Manthe, Zhao Li, C.-J. Richard Shi, Kartike...
ISCAS
2003
IEEE
122views Hardware» more  ISCAS 2003»
14 years 3 months ago
Reducing the number of variable movements in exact BDD minimization
Ordered Binary Decision Diagrams (BDDs) are frequently used in logic synthesis. In this paper a new exact BDD minimization algorithm is presented, which is based on state space se...
Rüdiger Ebendt
GECCO
2000
Springer
142views Optimization» more  GECCO 2000»
14 years 1 months ago
Improving EAs for Sequencing Problems
Sequencing problems have to be solved very often in VLSI CAD. To obtain results of high quality, Evolutionary Algorithms (EAs) have been successfully applied in many cases. Howeve...
Wolfgang Günther, Rolf Drechsler