Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
The High Performance Storage System (HPSS) is a mature Hierarchical Storage Management (HSM) system that was developed around a network-centered architecture, with client access t...
Background: In the last decade, biochemical studies have revealed that epigenetic modifications including histone modifications, histone variants and DNA methylation form a comple...
Xiaojiang Xu, Stephen Hoang, Marty W. Mayo, Stefan...
Abstract This paper is about tool support for knowledgeintensive engineering tasks. In particular, it introduces software technology to assist the design of complex technical syste...