1059 search results - page 122 / 212 » Standard Logics Are Valuation-Nonmonotonic |
CIT
2006
Springer
14 years 1 months ago
2006
Springer
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard. A major enhancement to the standard is the addition of decimal format, thus the design of BCD arithmetic...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
This paper presents experimental measurements of the differences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power cons...
WSC
2004
13 years 11 months ago
2004
In standard optimistic parallel event simulation, no restriction exists on the maximum lag in simulation time between the fastest and slowest logical processes (LPs). Overoptimist...
ISPD
2012
ACM
12 years 5 months ago
2012
ACM
As technology scales and frequency increases, a new design style is emerging, referred to as hybrid designs, which contain a mixture of random logic and datapath standard cell com...
ENTCS
2006
13 years 10 months ago
2006
This paper has the purpose of reviewing some of the established relationships between logic and concurrency, and of exploring new ones. Concurrent and distributed systems are noto...