1186 search results - page 6 / 238 » State machine models of timing and circuit design |
MODELLIERUNG
2004
13 years 9 months ago
2004
APAL
2005
13 years 7 months ago
2005
APIN
2002
13 years 7 months ago
2002
This paper describes a new learning by example mechanism and its application for digital circuit design automation. This mechanism uses finite state machines to represent the infer...
DATE
2002
IEEE
14 years 18 days ago
2002
IEEE
By using a macro/micro state model we show how assumptions on the resolution of logical and physical timing of computation in computer systems has resulted in design methodologies...
ICCD
1995
IEEE
13 years 11 months ago
1995
IEEE
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...