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VTS
1997
IEEE
61views Hardware» more  VTS 1997»
13 years 11 months ago
Static logic implication with application to redundancy identification
Jian-Kun Zhao, Elizabeth M. Rudnick, Janak H. Pate...
DATE
2000
IEEE
87views Hardware» more  DATE 2000»
14 years 16 hour ago
Multi-Node Static Logic Implications for Redundancy Identification
This paper presents a method for redundancy identification (RID) using multi-node logic implications. The algorithm discovers a large number of direct and indirect implications b...
Kabir Gulrajani, Michael S. Hsiao
ISSTA
2004
ACM
14 years 1 months ago
An optimizing compiler for batches of temporal logic formulas
Model checking based on validating temporal logic formulas has proven practical and effective for numerous software engineering applications. As systems based on this approach ha...
James Ezick
CCS
2011
ACM
12 years 7 months ago
Fear the EAR: discovering and mitigating execution after redirect vulnerabilities
The complexity of modern web applications makes it difficult for developers to fully understand the security implications of their code. Attackers exploit the resulting security v...
Adam Doupé, Bryce Boe, Christopher Kruegel,...
ESOP
2005
Springer
14 years 1 months ago
Forward Slicing by Conjunctive Partial Deduction and Argument Filtering
Program slicing is a well-known methodology that aims at identifying the program statements that (potentially) affect the values computed at some point of interest. Within imperat...
Michael Leuschel, Germán Vidal