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» Statistical Approach to Networks-on-Chip
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PATMOS
2007
Springer
15 years 9 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
RECOMB
2007
Springer
15 years 9 months ago
Network Legos: Building Blocks of Cellular Wiring Diagrams
Publicly-available data sets provide detailed and large-scale information on multiple types of molecular interaction networks in a number of model organisms. These multi-modal univ...
T. M. Murali, Corban G. Rivera
AVSS
2006
IEEE
15 years 9 months ago
3D Human Motion Analysis in Monocular Video Techniques and Challenges
Extracting meaningful 3D human motion information from video sequences is of interest for applications like intelligent humancomputer interfaces, biometrics, video browsing and ind...
Cristian Sminchisescu
CCECE
2006
IEEE
15 years 9 months ago
A QoS Mapping Rule Builder
Although many QoS management architectures have been recently introduced with a lot of advanced features, they have never been widely used in the existing applications due to the ...
Kim Khoa Nguyen, Brigitte Kerhervé, Brigitt...
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ICTAI
2006
IEEE
15 years 9 months ago
On the Relationships between Clustering and Spatial Co-location Pattern Mining
The goal of spatial co-location pattern mining is to find subsets of spatial features frequently located together in spatial proximity. Example co-location patterns include servi...
Yan Huang, Pusheng Zhang