651 search results - page 11 / 131 » Statistical Approach to NoC Design |
KDD
1995
ACM
13 years 11 months ago
1995
ACM
We develop,in the context of discriminantanalysis,a generalapproachto the designof neuralarchitectures. It consistsin building a neuralnet ‘around’a statistical model family; ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...
CODES
2010
IEEE
13 years 5 months ago
2010
IEEE
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. The continuous miniaturization of semiconductor devices imposes serious threats to design robustness against process variations and environmental fluctuations. Modern ci...