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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
IPPS
2003
IEEE
14 years 1 months ago
Performance Modeling of the Grace Hash Join on Cluster Architectures
Aim of the paper is to develop a concise but comprehensive analytical model for the well-known Grace Hash Join algorithm on cost effective cluster architectures. This approach is ...
Erich Schikuta
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 16 days ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
ICIP
2000
IEEE
14 years 15 days ago
Joint Geometry/Texture Progressive Coding of 3D Models
Files of 3D models are often large and time-consuming to download. Most 3D viewers need the entire file to display a 3D model even when the user is interested only in a part of or...
Masahiro Okuda, Tsuhan Chen
IWSSD
2000
IEEE
14 years 15 days ago
Model Checking Implicit-Invocation Systems
While implicit invocation (publish-subscribe) systems have goodengineering properties, they are difficult toreason about and to test. Model checking such systems is an attractive...
David Garlan, Serge Khersonsky