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ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 6 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
CLUSTER
2009
IEEE
14 years 1 months ago
Finding a tradeoff between host interrupt load and MPI latency over Ethernet
—Achieving high-performance message passing on top of generic ETHERNET hardware suffers from the NIC interruptdriven model where coalescing is usually involved. We present an in-...
Brice Goglin, Nathalie Furmento
IWMM
2007
Springer
118views Hardware» more  IWMM 2007»
14 years 3 months ago
Detecting and eliminating memory leaks using cyclic memory allocation
We present and evaluate a new technique for detecting and eliminating memory leaks in programs with dynamic memory allocation. This technique observes the execution of the program...
Huu Hai Nguyen, Martin C. Rinard
CASES
2006
ACM
14 years 3 months ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...
DAWAK
2008
Springer
13 years 10 months ago
Efficient Data Distribution for DWS
The DWS (Data Warehouse Striping) technique is a data partitioning approach especially designed for distributed data warehousing environments. In DWS the fact tables are distribute...
Raquel Almeida, Jorge Vieira, Marco Vieira, Henriq...