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TVLSI
2002
100views more  TVLSI 2002»
15 years 3 months ago
Architectural strategies for low-power VLSI turbo decoders
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
Guido Masera, M. Mazza, Gianluca Piccinini, F. Vig...
JCM
2007
115views more  JCM 2007»
15 years 3 months ago
eEPC: an EPCglobal-compliant Embedded Architecture for RFID-based Solutions
— Radio Frequency Identification (RFID) technology has a lot of potential to improve visibility across the supply chain and automate the business processes. This paper describes ...
Franco Fummi, Giovanni Perbellini
ICPP
1995
IEEE
15 years 7 months ago
Fusion of Loops for Parallelism and Locality
Loop fusion improves data locality and reduces synchronization in data-parallel applications. However, loop fusion is not always legal. Even when legal, fusion may introduce loop-...
Naraig Manjikian, Tarek S. Abdelrahman
QEST
2007
IEEE
15 years 10 months ago
A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
Girish B. C., R. Govindarajan
IH
2005
Springer
15 years 9 months ago
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance
Abstract. Information hiding has been studied in many security applications such as authentication, copyright management and digital forensics. In this work, we introduce a new app...
Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan K...