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156views
14 years 8 months ago
Dynamic Virtual Ground Voltage Estimation for Power Gating
With the technology moving into the deep sub-100nm region, the increase of leakage power consumption necessitates more aggressive power reduction techniques. Power gating is a prom...
Hao Xu, Ranga Vemuri, Wen-Ben Jone
ISCA
2000
IEEE
92views Hardware» more  ISCA 2000»
15 years 7 months ago
Trace preconstruction
Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due ...
Quinn Jacobson, James E. Smith
CSREAESA
2003
15 years 4 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...
USENIX
2003
15 years 4 months ago
Kernel Support for Faster Web Proxies
This paper proposes two mechanisms for reducing the communication-related overheads of Web applications. One mechanism is user-level connection tracking, which allows an applicati...
Marcel-Catalin Rosu, Daniela Rosu
VLSISP
2008
239views more  VLSISP 2008»
15 years 2 months ago
An Embedded Real-Time Surveillance System: Implementation and Evaluation
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Pe...