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SAC
2010
ACM
13 years 8 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ECCC
2007
115views more  ECCC 2007»
13 years 8 months ago
A (De)constructive Approach to Program Checking
Program checking, program self-correcting and program selftesting were pioneered by [Blum and Kannan] and [Blum, Luby and Rubinfeld] in the mid eighties as a new way to gain conï¬...
Shafi Goldwasser, Dan Gutfreund, Alexander Healy, ...
SCHOLARPEDIA
2008
76views more  SCHOLARPEDIA 2008»
13 years 7 months ago
Stomatogastric ganglion
ABSTRACT: The lobster stomatogastric ganglion contains 30 neurons and when modulated can produce two distinct rhythmic motor patterns--the gastric mill and the pyloric. The complet...
Allen I. Selverston
ICCAD
2009
IEEE
131views Hardware» more  ICCAD 2009»
13 years 6 months ago
Scheduling with soft constraints
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Jason Cong, Bin Liu, Zhiru Zhang
ICCAD
2009
IEEE
125views Hardware» more  ICCAD 2009»
13 years 6 months ago
CROP: Fast and effective congestion refinement of placement
Modern circuits become harder to route with the ever decreasing design features. Previous routability-driven placement techniques are usually tightly coupled with the underlying p...
Yanheng Zhang, Chris Chu