Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
In this paper, we study the problem of anomaly detection in high-dimensional network streams. We have developed a new technique, called Stream Projected Ouliter deTector (SPOT), t...
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
This paper presents the following results on sets that are complete for NP. (i) If there is a problem in NP that requires 2nΩ(1) time at almost all lengths, then every many-one N...
The field of Evolvable Hardware, applying artificial evolution to the design of digital and analogue hardware is around ten years old. However, the field is far from reaching m...