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GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
14 years 4 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
ISI
2008
Springer
13 years 8 months ago
Anomaly detection in high-dimensional network data streams: A case study
In this paper, we study the problem of anomaly detection in high-dimensional network streams. We have developed a new technique, called Stream Projected Ouliter deTector (SPOT), t...
Ji Zhang, Qigang Gao, Hai H. Wang
DAC
2002
ACM
14 years 11 months ago
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
STACS
2010
Springer
14 years 4 months ago
Collapsing and Separating Completeness Notions under Average-Case and Worst-Case Hypotheses
This paper presents the following results on sets that are complete for NP. (i) If there is a problem in NP that requires 2nΩ(1) time at almost all lengths, then every many-one N...
Xiaoyang Gu, John M. Hitchcock, Aduri Pavan
AHS
2007
IEEE
262views Hardware» more  AHS 2007»
14 years 4 months ago
Addressing the Metric Challenge: Evolved versus Traditional Fault Tolerant Circuits
The field of Evolvable Hardware, applying artificial evolution to the design of digital and analogue hardware is around ten years old. However, the field is far from reaching m...
Pauline C. Haddow, Morten Hartmann, Asbjørn...