Sciweavers

871 search results - page 75 / 175
» Streaming Reduction Circuit
Sort
View
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 8 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
14 years 5 months ago
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration
Nanowire crossbar is one of the most promising circuit solutions for nanoelectronics. We show nanowire crossbars do not scale well in terms of logic density and speed. We conseque...
Mian Dong, Lin Zhong
DSD
2007
IEEE
140views Hardware» more  DSD 2007»
14 years 5 months ago
Pseudo-Random Pattern Generator Design for Column-Matching BIST
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built-in self-test design meth...
Petr Fiser
PET
2007
Springer
14 years 5 months ago
Pairing-Based Onion Routing
Abstract. This paper presents a novel use of pairing-based cryptography to improve circuit construction in onion routing anonymity networks. Instead of iteratively and interactivel...
Aniket Kate, Gregory M. Zaverucha, Ian Goldberg
ETS
2006
IEEE
100views Hardware» more  ETS 2006»
14 years 5 months ago
Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters
— Accurate generation of circuit specifications from test signatures is a difficult problem, since analytical expressions cannot precisely describe the nonlinear relationships ...
Byoungho Kim, Hongjoong Shin, Ji Hwan (Paul) Chun,...