79 search results - page 3 / 16 » Structural Abstraction of Software Verification Conditions |
TCAD
2008
13 years 7 months ago
2008
The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, ...
SEUS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract. Ubiquitous embedded computing systems expected to reliably perform one or more relevant tasks need design and verification methods currently not available. New envisioned...
TACAS
2010
Springer
13 years 5 months ago
2010
Springer
Abstract. Intermediate languages are a paradigm to separate concerns in software verification systems when bridging the gap between programming languages and the logics understood ...
ECEASST
2010
13 years 4 months ago
2010
Abstract. The precise specification of software models is a major concern in model-driven design of object-oriented software. In this paper, we investigate how program graphs, a la...
TCAD
2008
13 years 7 months ago
2008
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...