574 search results - page 112 / 115 » Structured Parallel Simulation Modeling and Programming |
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
ICS
2004
Tsinghua U.
14 years 22 days ago
2004
Tsinghua U.
We propose a novel replacement algorithm, called InterReference Gap Distribution Replacement (IGDR), for setassociative secondary caches of processors. IGDR attaches a weight to e...
TIP
1998
13 years 7 months ago
1998
—We propose novel discrete cosine transform (DCT) pseudophase techniques to estimate shift/delay between two onedimensional (1-D) signals directly from their DCT coefficients by...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
SC
2005
ACM
14 years 27 days ago
2005
ACM
The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, ...