160 search results - page 22 / 32 » Structuring the verification of heap-manipulating programs |
ASE
2010
13 years 10 months ago
2010
Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. Howev...
SIGSOFT
2003
ACM
14 years 10 months ago
2003
ACM
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
AAAI
2008
13 years 11 months ago
2008
In this poster we describe the tabling techniques for Sequential and Concurrent Horn Transaction Logic. Horn Transaction Logic is an extension of classical logic programming with ...
CADE
2007
Springer
14 years 10 months ago
2007
Springer
Abstract. Hoare logic is widely used for software specification and verification. Frequently we need to prove the total correctness of a program: to prove that the program not only...
ASPDAC
2004
ACM
14 years 3 months ago
2004
ACM
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...