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DAC
2005
ACM
14 years 9 months ago
StressTest: an automatic approach to test generation via activity monitors
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
ISI
2006
Springer
13 years 8 months ago
An Embedded Bayesian Network Hidden Markov Model for Digital Forensics
In the paper we combine a Bayesian Network model for encoding forensic evidence during a given time interval with a Hidden Markov Model (EBN-HMM) for tracking and predicting the de...
Olivier Y. de Vel, Nianjun Liu, Terry Caelli, Tib&...
CORR
2007
Springer
110views Education» more  CORR 2007»
13 years 8 months ago
Graph Annotations in Modeling Complex Network Topologies
abstract such additional information as network annotations. We introduce a network topology modeling framework that treats annotations as an extended correlation profile of a net...
Xenofontas A. Dimitropoulos, Dmitri V. Krioukov, A...
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
14 years 25 days ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
ICRA
2000
IEEE
176views Robotics» more  ICRA 2000»
14 years 7 days ago
RRT-Connect: An Efficient Approach to Single-Query Path Planning
A simple and efficient randomized algorithm is presented for solving single-query path planning problems in high-dimensional configuration spaces. The method works by incrementall...
James J. Kuffner Jr., Steven M. LaValle