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ISCA
2003
IEEE
120views Hardware» more  ISCA 2003»
14 years 19 days ago
ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes
While removing software bugs consumes vast amounts of human time, hardware support for debugging in modern computers remains rudimentary. Fortunately, we show that mechanisms for ...
Milos Prvulovic, Josep Torrellas
PLDI
2003
ACM
14 years 18 days ago
Compile-time composition of run-time data and iteration reorderings
Many important applications, such as those using sparse data structures, have memory reference patterns that are unknown at compile-time. Prior work has developed runtime reorderi...
Michelle Mills Strout, Larry Carter, Jeanne Ferran...
SIGCOMM
2003
ACM
14 years 18 days ago
Scaling internet routers using optics
Routers built around a single-stage crossbar and a centralized scheduler do not scale, and (in practice) do not provide the throughput guarantees that network operators need to ma...
Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, Da...
WISE
2002
Springer
14 years 7 days ago
UTML: Unified Transaction Modeling Language
Web transactions may be complex, composed of several sub-transactions accessing different resources including legacy systems. They may also have complex semantics. To deal with co...
Nektarios Gioldasis, Stavros Christodoulakis
ICALP
2001
Springer
13 years 11 months ago
Permutation Editing and Matching via Embeddings
Abstract. If the genetic maps of two species are modelled as permutations of (homologous) genes, the number of chromosomal rearrangements in the form of deletions, block moves, inv...
Graham Cormode, S. Muthukrishnan, Süleyman Ce...