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ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 29 days ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
ISPD
2005
ACM
239views Hardware» more  ISPD 2005»
14 years 1 months ago
Mapping algorithm for large-scale field programmable analog array
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...
SBACPAD
2006
IEEE
148views Hardware» more  SBACPAD 2006»
14 years 1 months ago
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
Vasanth Krishna Namasivayam, Animesh Pathak, Vikto...
SIGMETRICS
2008
ACM
106views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
Performance bounds for peer-assisted live streaming
Peer-assisted streaming is a promising way for service providers to offer high-quality IPTV to consumers at reasonable cost. In peerassisted streaming, the peers exchange video ch...
Shao Liu, Rui Zhang-Shen, Wenjie Jiang, Jennifer R...
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
13 years 11 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...