119 search results - page 11 / 24 » Supporting Reconfigurable Parallel Multimedia Applications |
SIPS
2008
IEEE
14 years 1 months ago
2008
IEEE
The development of embedded system has been toward the multicore architectures in the recent years. It raises concerns in the community of supporting programming models and langua...
FPL
2009
Springer
13 years 12 months ago
2009
Springer
The reconfigurable mesh model for massively parallel computing has recently been rediscovered and proposed as the basis of a practical many-core architecture. With this paper, we...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
CLUSTER
1999
IEEE
13 years 7 months ago
1999
IEEE
To secure interactive multimedia applications in wireless LANs WLANs it is pertinent to implement real time cryptographic services. In this paper we evaluate the use of software b...
DATE
2003
IEEE
14 years 20 days ago
2003
IEEE
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...