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MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 8 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
HPCA
2011
IEEE
13 years 10 days ago
ACCESS: Smart scheduling for asymmetric cache CMPs
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
Xiaowei Jiang, Asit K. Mishra, Li Zhao, Ravishanka...
EUROPAR
2009
Springer
14 years 3 months ago
Adaptive Parallel Householder Bidiagonalization
With the increasing use of large image and video archives and high-resolution multimedia data streams in many of today’s research and application areas, there is a growing need f...
Fangbin Liu, Frank J. Seinstra
ICPADS
2002
IEEE
14 years 1 months ago
A Mobile Cache Consistency Protocol Using Shareable Read/Write Time Locks
Object caching is often used to improve the performance of mobile applications, but the gain is often lessened by the additional load of maintaining consistency between an origina...
Abhinav Vora, Zahir Tari, Peter Bertók, Kwo...
IPPS
2008
IEEE
14 years 3 months ago
Scalable server provisioning with HOP-SCOTCH
The problem of provisioning servers in a cluster infrastructure includes the issues of coordinating access and sharing of physical resources, loading servers with the appropriate ...
David Daly, M. A. Silva, José E. Moreira