199 search results - page 6 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
137
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DAC
1995
ACM
15 years 7 months ago
1995
ACM
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
122
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
128
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Recent work on Differential Power Analysis shows that even mathematically-secure cryptographic protocols may be vulnerable at the physical implementation level. By measuring energ...
119
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CADE
1998
Springer
15 years 7 months ago
1998
Springer
Abstract. The rank/activity restriction on binary resolution is introduced. It accepts only a single derivation tree from a large equivalence class of such trees. The equivalence c...
107
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ISCAS
2008
IEEE
15 years 10 months ago
2008
IEEE
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...