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» Symbolic Model Checking for Probabilistic Timed Automata
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ATVA
2008
Springer
104views Hardware» more  ATVA 2008»
13 years 9 months ago
A Direct Algorithm for Multi-valued Bounded Model Checking
Multi-valued Model Checking is an extension of classical, two-valued model checking with multi-valued logic. Multi-valuedness has been proved useful in expressing additional inform...
Jefferson O. Andrade, Yukiyoshi Kameyama
ATVA
2006
Springer
130views Hardware» more  ATVA 2006»
13 years 11 months ago
The Implementation of Mazurkiewicz Traces in POEM
We present the implementation of the trace theory in a new model checking tool framework, POEM, that has a strong emphasis on Partial Order Methods. A tree structure is used to sto...
Peter Niebert, Hongyang Qu
DAC
2004
ACM
14 years 8 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
FM
2009
Springer
163views Formal Methods» more  FM 2009»
14 years 3 days ago
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks
We study a clock synchronization protocol for the Chess WSN. First, we model the protocol as a network of timed automata and verify various instances using the Uppaal model checker...
Faranak Heidarian, Julien Schmaltz, Frits W. Vaand...
TASE
2007
IEEE
14 years 1 months ago
Evaluation of SAT-based Bounded Model Checking of ACTL Properties
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...
Yanyan Xu, Wei Chen, Liang Xu, Wenhui Zhang