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ET
2007
101views more  ET 2007»
13 years 7 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DAGSTUHL
2011
12 years 6 months ago
Interactive Isocontouring of High-Order Surfaces
Scientists and engineers are making increasingly use of hp-adaptive discretization methods to compute simulations. While techniques for isocontouring the high-order data generated...
Christian Azambuja Pagot, Joachim E. Vollrath, Fil...
RTSS
2009
IEEE
14 years 1 months ago
Spatiotemporal Delay Control for Low-Duty-Cycle Sensor Networks
—Data delivery is a major function of sensor network applications. Many applications, such as military surveillance, require the detection of interested events to be reported to ...
Yu Gu, Tian He, Mingen Lin, Jinhui Xu
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
VTC
2006
IEEE
14 years 1 months ago
Throughput Performance of Iterative Frequency-Domain SIC with 2D MMSE-FDE for SC-MIMO Multiplexing
— Broadband wireless packet access will be the core technology of the next generation mobile communication systems. For very high-speed and high-quality packet transmissions in a...
Akinori Nakajima, Fumiyuki Adachi