We consider the formal verification of the cache coherence protocol of the Stanford FLASH multiprocessor for N processors. The proof uses the SMV proof assistant, a proof system ba...
Abstract—Several successful approaches to software verificabased on the construction and analysis of an abstract reachability tree (ART). The ART represents unwindings of the co...
Dirk Beyer, Alessandro Cimatti, Alberto Griggio, M...
Abstract. We introduce the notion of array-based system as a suittraction of infinite state systems such as broadcast protocols or sorting programs. By using a class of quantified-...
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
Proving the equivalenceof two Finite State Machines (FSMs) has many applications to synthesis, verication, testing, and diagnosis. Building their product machine is a theoretical ...
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Pa...