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CHARME
2001
Springer
162views Hardware» more  CHARME 2001»
13 years 11 months ago
Parameterized Verification of the FLASH Cache Coherence Protocol by Compositional Model Checking
We consider the formal verification of the cache coherence protocol of the Stanford FLASH multiprocessor for N processors. The proof uses the SMV proof assistant, a proof system ba...
Kenneth L. McMillan
FMCAD
2009
Springer
14 years 2 months ago
Software model checking via large-block encoding
Abstract—Several successful approaches to software verificabased on the construction and analysis of an abstract reachability tree (ART). The ART represents unwindings of the co...
Dirk Beyer, Alessandro Cimatti, Alberto Griggio, M...
CADE
2008
Springer
14 years 8 months ago
Towards SMT Model Checking of Array-Based Systems
Abstract. We introduce the notion of array-based system as a suittraction of infinite state systems such as broadcast protocols or sorting programs. By using a class of quantified-...
Silvio Ghilardi, Enrica Nicolini, Silvio Ranise, D...
SPIN
2010
Springer
13 years 6 months ago
An Automata-Based Symbolic Approach for Verifying Programs on Relaxed Memory Models
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
Alexander Linden, Pierre Wolper
FMSD
1998
60views more  FMSD 1998»
13 years 7 months ago
The General Product Machine: a New Model for Symbolic FSM Traversal
Proving the equivalenceof two Finite State Machines (FSMs) has many applications to synthesis, veri cation, testing, and diagnosis. Building their product machine is a theoretical ...
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Pa...