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ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
14 years 12 days ago
Extraction of Gate Level Models from Transistor Circuits by Four-Valued Symbolic Analysis
The program TRANALYZE generates a gate-level representation of an MOS transistor circuit. The resulting model contains only four-valued unit and zero delay logic primitives, suita...
Randal E. Bryant
AUTOMATICA
2008
74views more  AUTOMATICA 2008»
13 years 9 months ago
Symbolic reachability analysis of genetic regulatory networks using discrete abstractions
screte abstractions Gr
Grégory Batt, Hidde de Jong, Michel Page, J...
CORR
2006
Springer
57views Education» more  CORR 2006»
13 years 9 months ago
On Verifying Complex Properties using Symbolic Shape Analysis
Thomas Wies, Viktor Kuncak, Karen Zee, Andreas Pod...
IJFCS
2008
158views more  IJFCS 2008»
13 years 9 months ago
An Alternative Construction in Symbolic Reachability Analysis of Second Order Pushdown Systems
Abstract. Recently, it has been shown that for any higher order pushdown system H and for any regular set C of configurations, the set pre H(C), is regular. In this paper, we give ...
Anil Seth