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EDCC
1999
Springer
14 years 2 months ago
A Fault Tolerant Clock Synchronization Algorithm for Systems with Low-Precision Oscillators
In this paper we present a new fault tolerant clock synchronization algorithm called the Fault Tolerant Daisy Chain algorithm. It is intended for internal clock synchronization of...
Henrik Lönn
HPCA
1997
IEEE
14 years 2 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
14 years 2 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...
EUROPAR
2010
Springer
13 years 11 months ago
cTrust: Trust Aggregation in Cyclic Mobile Ad Hoc Networks
In a Cyclic Mobile Ad Hoc Network (CMANET) where nodes move cyclically, we formulate trust management problems and propose the cTrust scheme to handle trust establishment and aggre...
Huanyu Zhao, Xin Yang, Xiaolin Li
ANOR
2010
77views more  ANOR 2010»
13 years 10 months ago
Time-dependent analysis for refused admissions in clinical wards
For capacity planning issues in health care, such as the allocation of hospital beds, the admissions rate of patients is commonly assumed to be constant over time. In addition to ...
René Bekker, A. M. de Bruin