Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Abstract. In this paper, we propose new adaptive local refinement (ALR) strategies for firstorder system least-squares (FOSLS) finite element in conjunction with algebraic multi...
J. H. Adler, Thomas A. Manteuffel, Stephen F. McCo...
Abstract— The Publish-Subscribe (P/S) communication paradigm fosters high decoupling among distributed components. This facilitates the design of dynamic applications, but also i...
Model-Driven Engineering (MDE) advocates the use of models at every step of the software development process. Within this context, a team of engineers collectively and collaborati...
Previous numerical and analytical work has shown that synaptic coupling can allow a network of model neurons to synchronize despite heterogeneity in intrinsic parameter values. In ...