50 search results - page 9 / 10 » Synchronization Processor Synthesis for Latency Insensitive ... |
DATE
2008
IEEE
14 years 4 months ago
2008
IEEE
We propose an interleaved memory organization supporting multi-pattern parallel accesses in twodimensional (2D) addressing space. Our proposal targets computing systems with high ...
DAC
2000
ACM
14 years 10 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
PSB
2001
13 years 11 months ago
2001
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
RSP
2000
IEEE
14 years 2 months ago
2000
IEEE
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
IPPS
2010
IEEE
13 years 7 months ago
2010
IEEE
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...