29 search results - page 3 / 6 » Synchronization coherence: A transparent hardware mechanism ... |
SBCCI
2009
ACM
14 years 1 months ago
2009
ACM
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper explores optimization techniques of the synchronization mechanisms for MPSoCs based on complex interconnect (Network-on-Chip), targeted at future powerefficient system...
IPPS
2000
IEEE
13 years 11 months ago
2000
IEEE
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
CODES
2009
IEEE
14 years 4 days ago
2009
IEEE
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...