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ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
14 years 4 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
CGO
2009
IEEE
14 years 2 months ago
Software Pipelined Execution of Stream Programs on GPUs
—The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. This model allows programmers to sp...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
ICS
1992
Tsinghua U.
13 years 11 months ago
The CODE 2.0 graphical parallel programming language
CODE 2.0 is a graphical parallel programming system that targets the three goals of ease of use, portability, and production of efficient parallel code. Ease of use is provided by...
Peter Newton, James C. Browne
ICPP
1997
IEEE
13 years 11 months ago
Automatic Parallelization and Scheduling of Programs on Multiprocessors using CASCH
r The lack of a versatile software tool for parallel program development has been one of the major obstacles for exploiting the potential of high-performance architectures. In this...
Ishfaq Ahmad, Yu-Kwong Kwok, Min-You Wu, Wei Shu
ASAP
2010
IEEE
143views Hardware» more  ASAP 2010»
13 years 9 months ago
Loop transformations for interface-based hierarchies IN SDF graphs
Data-flow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of data-flow, termed synchronous data...
Jonathan Piat, Shuvra S. Bhattacharyya, Mickaë...