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» Synchronous Elastic Circuits
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ASYNC
2010
IEEE
230views Hardware» more  ASYNC 2010»
13 years 7 days ago
The Devolution of Synchronizers
— Synchronizers play a key role in multi-clock domain systems on chip. Traditionally, improvement of synchronization parameters with scaling has been assumed. In particular, the ...
Salomon Beer, Ran Ginosar, Michael Priel, Rostisla...
VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
14 years 24 days ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
14 years 1 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann
CDC
2008
IEEE
119views Control Systems» more  CDC 2008»
14 years 3 months ago
Dissipativity properties of detailed models of synchronous generators
— This paper studies the dissipativity properties of full order dynamic models of synchronous generators. It is shown that, under widely accepted assumptions, these models satisf...
Alvaro Giusto, Alex M. Stankovic, Romeo Ortega
AHS
2006
IEEE
86views Hardware» more  AHS 2006»
14 years 2 months ago
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica