115 search results - page 15 / 23 » Synthesis of Asynchronous Hardware from Petri Nets |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
ACSD
2006
IEEE
14 years 1 months ago
2006
IEEE
Timed Automata (TA) and Time Petri Nets (TPN) are two well-established formal models for real-time systems. Recently, a linear transformation of TA to TPNs preserving reachability...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
CAV
2010
Springer
13 years 10 months ago
2010
Springer
We consider the class of finite-state programs executed by an unbounded number of replicated threads communicating via shared variables. The thread-state reachability problem for t...
ECMDAFA
2010
Springer
13 years 10 months ago
2010
Springer
Dynamic UML models like sequence diagrams (SD) lack sufficient formal semantics, making it difficult to build automated tools for their analysis, simulation and validation. A commo...