Sciweavers

115 search results - page 20 / 23
» Synthesis of Asynchronous Hardware from Petri Nets
Sort
View
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
13 years 11 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
CHARME
1995
Springer
120views Hardware» more  CHARME 1995»
13 years 11 months ago
Timing analysis of asynchronous circuits using timed automata
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
Oded Maler, Amir Pnueli
ISMVL
2010
IEEE
209views Hardware» more  ISMVL 2010»
14 years 17 days ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
ECMDAFA
2009
Springer
119views Hardware» more  ECMDAFA 2009»
13 years 5 months ago
Managing Model Adaptation by Precise Detection of Metamodel Changes
Technological and business changes influence the evolution of software systems. When this happens, the software artifacts may need to be adapted to the changes. This need is rapidl...
Kelly Garcés, Frédéric Jouaul...
ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
13 years 11 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers